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 7WBD383 Translating Bus Exchange Switch
The 7WBD383 is an advanced high-speed low-power translating bus exchange switch in ultra-small footprints.
Features http://onsemi.com MARKING DIAGRAMS
8 1 UDFN8 MU SUFFIX CASE 517AJ ULLGA8 1.45 x 1.0 CASE 613AA ULLGA8 1.6 x 1.0 CASE 613AB ULLGA8 1.95 x 1.0 CASE 613AC ALM G
* * * * * * *
High Speed: tPD = 0.25 ns (Max) @ VCC = 4.5 V 3 W Switch Connection Between 2 Ports Power Down Protection Provided on Inputs Zero Bounce TTL-Compatible Control Inputs Ultra-Small Pb-Free Packages These are Pb-Free Devices
1
6M G
1
AQM G
1
AQM G
1
8
UQFN8 MU SUFFIX CASE 523AN
1
AJ M*G G
8 US8 US SUFFIX CASE 493
AG M*G G
1 8 Micro8] DM SUFFIX CASE 846A D383 AYWG G
1 A = Assembly Location Y = Year W = Work Week M = Date Code G = Pb-Free Package (Note: Microdot may be in either location) *Date Code orientation may vary depending upon manufacturing location.
This document contains information on some products that are still under development. ON Semiconductor reserves the right to change or discontinue these products without notice.
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet.
(c) Semiconductor Components Industries, LLC, 2010
February, 2010 - Rev. 0
1
Publication Order Number: 7WBD383/D
7WBD383
OE
1
8
VCC
OE 7
A 6
B 5 OE A 1 2 3 4 8 7 6 5 VCC C D EX
A
2
7
C VCC 8 4 GND
B 1 C 2 D 3 EX GND
B
3
6
D
GND
4
5
EX
Figure 2. UQFN8 Figure 1. ULLGA8/UDFN8
(Top Thru-View) (Top Thru-View)
Figure 3. US8/Micro8
(Top View)
A
C
B EX OE
D
Figure 4. Logic Diagram
FUNCTION TABLE
Input OE L L H Input EX L H X Function A = C; B = D A = D; B = C Disconnect
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7WBD383
MAXIMUM RATINGS
Symbol VCC VIN VI/O IIK IOK IO ICC IGND TSTG TL TJ qJA DC Supply Voltage Control Pin Input Voltage Switch Input / Output Voltage Control Pin DC Input Diode Current Switch I/O Port DC Diode Current ON-State Switch Current Continuous Current Through VCC or GND DC Supply Current Per Supply Pin DC Ground Current per Ground Pin Storage Temperature Range Lead Temperature, 1 mm from Case for 10 Seconds Junction Temperature Under Bias Thermal Resistance US8 (Note 1) UDFN8 UQFN8 ULLGA8 Micro8 US8 UDFN8 UQFN8 ULLGA8 Micro8 VIN < GND VI/O < GND Parameter Value -0.5 to +7.0 -0.5 to +7.0 -0.5 to +7.0 -50 -50 $128 $150 $150 $150 -65 to +150 260 150 251 111 208 455 392 498 1127 601 274 319 Level 1 Oxygen Index: 28 to 34 Human Body Mode (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) UL 94 V-0 @ 0.125 in > 2000 > 200 N/A $200 V Unit V V V mA mA mA mA mA mA C C C C/W
PD
Power Dissipation in Still Air at 85C
mW
MSL FR VESD
Moisture Sensitivity Flammability Rating ESD Withstand Voltage
ILATCHUP
Latchup Performance Above VCC and Below GND at 125 C (Note 5)
mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Measured with minimum pad spacing on an FR4 board, using 10 mm-by-1 inch, 2 ounce copper trace no air flow. 2. Tested to EIA / JESD22-A114-A. 3. Tested to EIA / JESD22-A115-A. 4. Tested to JESD22-C101-A. 5. Tested to EIA / JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VIN VI/O TA Dt/DV Positive DC Supply Voltage Control Pin Input Voltage Switch Input / Output Voltage Operating Free-Air Temperature Input Transition Rise or Fall Rate Control Input Switch I/O Parameter Min 4.0 0 0 -55 0 0 Max 5.5 5.5 5.5 +125 5 DC Unit V V V C nS/V
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7WBD383
DC ELECTRICAL CHARACTERISTICS
VCC (V) 4.5 4.0 to 5.5 4.0 to 5.5 See Figure 5 0 v VIN v 5.5 V VI/O = 0 to 5.5 V IO = 0, VIN = VCC or 0 V OE = GND OE = VCC One input at 3.4 V; Other inputs at VCC or GND VI/O = 0, II/O = 64 mA II/O = 30 mA VI/O = 2.4, II/O = 15 mA VI/O = 2.4, II/O = 15 mA 4.0 5.5 0 5.5 1.0 0.1 5.5 1.0 1.0 2.5 mA mA mA 0.1 0.1 1.0 1.0 mA mA 2.0 0.8 TA = 255C Min Typ Max -1.2 2.0 0.8 TA = -555C to +1255C Min Max -1.2 Unit V V V
Symbol VIK VIH VIL VOH IIN IOFF ICC
Parameter Clamp Diode Voltage High-Level Input Voltage (Control) Low-Level Input Voltage (Control) Output Voltage High Input Leakage Current Power Off Leakage Current Quiescent Supply Current
Conditions II/O = -18 mA
DICC
Increase in Supply Current (Control Pin) Switch ON Resistance
RON
4.5
3 3 15 50
7 7 50 70
7 7 50 70
W
AC ELECTRICAL CHARACTERISTICS
VCC (V) 4.0 to 5.5 4.0 to 5.5 4.5 to 5.5 4.0 tDIS Output Disable Time 4.5 to 5.5 4.0 CIN CIO(ON) CIO(OFF) Control Input Capacitance Switch On Capacitance Switch Off Capacitance VIN = 5 or 0 V Switch ON Switch OFF 5.0 5.0 5.0 0.8 0.8 0.8 0.8 2.5 3.0 3.0 2.9 2.5 10 5 TA = 25 5C Min Typ Max 0.25 4.5 4.2 4.6 4.8 4.4 0.8 0.8 0.8 0.8 TA = -555C to +1255C Min Max 0.25 4.5 4.2 4.6 4.8 4.4 pF pF pF ns Unit ns ns ns
Symbol tPD tPD-EX tEN
Parameter Propagation Delay, Bus to Bus Propagation Delay, EX to Bus Output Enable Time
Test Condition See Figure 6 See Figure 6 and Figure 7 See Figure 6
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4
7WBD383
TYPICAL DC CHARACTERISTICS
3.75 VOH, HIGH LEVEL OUTPUT VOLTAGE (V) 3.50 3.25 3.00 2.75 2.50 2.25 2.00 4.50 4.75 5.00 5.25 TA = +85C VIN = VCC 5.50 5.75 IOH = -0.1 mA -6 mA -12 mA -24 mA
VCC, SUPPLY VOLTAGE (V)
3.75 VOH, HIGH LEVEL OUTPUT VOLTAGE (V) 3.50 3.25 3.00 2.75 2.50 2.25 2.00 4.50 4.75 5.00 5.25 TA = +25C VIN = VCC 5.50 5.75 IOH = -0.1 mA -6 mA -12 mA -24 mA
VCC, SUPPLY VOLTAGE (V)
3.75 VOH, HIGH LEVEL OUTPUT VOLTAGE (V) 3.50 3.25 3.00 2.75 2.50 2.25 2.00 4.50 4.75 5.00 5.25 TA = -40C VIN = VCC 5.50 5.75 IOH = -0.1 mA -6 mA -12 mA -24 mA
VCC, SUPPLY VOLTAGE (V)
Figure 5. Output Voltage High vs Supply Voltage
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5
7WBD383
AC LOADING AND WAVEFORMS
From Output Under Test 500 W S1 7V Open GND CL = 50 pF* 500 W Test tPD tPLZ/tPZL tPHZ/tPZH S1 Open 7V Open
*CL includes probes and jig capacitance. Output Control tPZL Output Waveform 1 S1 at 7 V (Note 6) tPZH Output Waveform 2 S1 at Open (Note 6) 1.5 V 1.5 V 1.5 V 3V 0V tPLZ 1.5 V 3.5 V VOL + 0.3 V VOL tPHZ VOH VOH - 0.3 V 0V
1.5 V Input tPLH 1.5 V
1.5 V
3V 0V tPHL VOH 1.5 V VOL
Output
Voltage Waveforms Propagation Delay Times
Voltage Waveforms Enable and Disable Times
6. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control 7. All input pulses are supplied by generators having the following characteristics: PRR v 10 MHz, ZO = 50 W, tr v 2.5 ns, tf v 2.5 ns. 8. The outputs are measured one at a time, with one transition per measurement. 9. tPLZ and tPHZ are the same as tDIS. 10. tPZL and tPZH are the same as tEN. 11. tPHL and tPLH are the same as tPD.
Figure 6. tPD, tEN, tDIS Loading and Waveforms
tr 2.5 ns Exchange (EX) 90% 1.5 V tPLH Output (A, B, C, D) Output (A, B, C, D) tPHL
tf 2.5 ns 3V 10% tPHL 1.5 V VOH VOL 1.5 V tPLH GND
Figure 7. tPD-EX Waveforms
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6
7WBD383
ORDERING INFORMATION
Device 7WBD383USG 7WBD383MUTAG 7WBD383AMUTCG 7WBD383AMX1TCG 7WBD383BMX1TCG 7WBD383CMX1TCG 7WBD383DMR2G Package US8 (Pb-Free) UDFN8 (Pb-Free) UQFN8 (Pb-Free) ULLGA8 - 0.5 mm Pitch (Pb-Free) ULLGA8 - 0.4 mm Pitch (Pb-Free) ULLGA8 - 0.35 mm Pitch (Pb-Free) Micro8 (Pb-Free) Shipping 3000 / Tape & Reel 3000 / Tape & Reel 3000 / Tape & Reel (In Development) 3000 / Tape & Reel (In Development) 3000 / Tape & Reel (In Development) 3000 / Tape & Reel (In Development) 4000 / Tape & Reel (In Development)
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
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7
7WBD383
PACKAGE DIMENSIONS
UDFN8 1.8 x 1.2, 0.4P CASE 517AJ-01 ISSUE O
D 0.10 C
PIN ONE REFERENCE
AB L1 DETAIL A
NOTE 5
E
0.10 C
TOP VIEW (A3) A
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM TERMINAL TIP. 4. MOLD FLASH ALLOWED ON TERMINALS ALONG EDGE OF PACKAGE. FLASH MAY NOT EXCEED 0.03 ONTO BOTTOM SURFACE OF TERMINALS. 5. DETAIL A SHOWS OPTIONAL CONSTRUCTION FOR TERMINALS. DIM A A1 A3 b b2 D E e L L1 L2 MILLIMETERS MIN MAX 0.45 0.55 0.00 0.05 0.127 REF 0.15 0.25 0.30 REF 1.80 BSC 1.20 BSC 0.40 BSC 0.45 0.55 0.00 0.03 0.40 REF
0.05 C 0.05 C
e/2 (b2)
1 4
(L2)
8 5 8X b
BOTTOM VIEW
EE EE
SIDE VIEW
A1
C
SEATING PLANE
e
DETAIL A 8X
L
MOUNTING FOOTPRINT* SOLDERMASK DEFINED
0.10 0.05
M M
CAB C
NOTE 3
0.22
7X
0.66
8X
1.50 1 0.32 0.40 PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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8
7WBD383
PACKAGE DIMENSIONS
ULLGA8 1.45x1.0, 0.35P CASE 613AA-01 ISSUE A
D A B
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM THE TERMINAL TIP. 4. A MAXIMUM OF 0.05 PULL BACK OF THE PLATED TERMINAL FROM THE EDGE OF THE PACKAGE IS ALLOWED. DIM A A1 b D E e L L1 SEATING PLANE MILLIMETERS MIN MAX --- 0.40 0.00 0.05 0.15 0.25 1.45 BSC 1.00 BSC 0.35 BSC 0.25 0.35 0.30 0.40
PIN ONE REFERENCE
0.10 C
0.10 C 0.05 C
8X
0.05 C
e/2 e
1 4 7X
L1 1
PKG OUTLINE
EEE EEE EEE
8
E
TOP VIEW
A SIDE VIEW A1 C
MOUNTING FOOTPRINT SOLDERMASK DEFINED*
0.48
7X
0.22
8X
L
NOTE 4
1.18
0.53
5 8X
b 0.10 C A B 0.05 C
NOTE 3
0.35 PITCH
DIMENSIONS: MILLIMETERS
BOTTOM VIEW
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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9
7WBD383
PACKAGE DIMENSIONS
ULLGA8 1.6x1.0, 0.4P CASE 613AB-01 ISSUE A
D A B
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM THE TERMINAL TIP. 4. A MAXIMUM OF 0.05 PULL BACK OF THE PLATED TERMINAL FROM THE EDGE OF THE PACKAGE IS ALLOWED. DIM A A1 b D E e L L1 SEATING PLANE MILLIMETERS MIN MAX --- 0.40 0.00 0.05 0.15 0.25 1.60 BSC 1.00 BSC 0.40 BSC 0.25 0.35 0.30 0.40
PIN ONE REFERENCE
0.10 C 0.10 C 0.05 C
8X
0.05 C
e/2 e
1 4 7X
L1 1
PKG OUTLINE
EEE EEE EEE
8
E
TOP VIEW
A SIDE VIEW A1 C
MOUNTING FOOTPRINT SOLDERMASK DEFINED*
0.49
7X
0.26
8X
L
NOTE 4
1.24
0.53
5 8X
b 0.10 C A B 0.05 C
NOTE 3
0.40 PITCH
DIMENSIONS: MILLIMETERS
BOTTOM VIEW
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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10
7WBD383
PACKAGE DIMENSIONS
ULLGA8 1.95x1.0, 0.5P CASE 613AC-01 ISSUE A
D A B
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM THE TERMINAL TIP. 4. A MAXIMUM OF 0.05 PULL BACK OF THE PLATED TERMINAL FROM THE EDGE OF THE PACKAGE IS ALLOWED. DIM A A1 b D E e L L1 MILLIMETERS MIN MAX --- 0.40 0.00 0.05 0.15 0.25 1.95 BSC 1.00 BSC 0.50 BSC 0.25 0.35 0.30 0.40
PIN ONE REFERENCE
0.10 C
0.10 C 0.05 C
8X
0.05 C
L1 1
PKG OUTLINE
EEEE EEEE EEEE
e/2
1 8
E
TOP VIEW
A SIDE VIEW A1 C
SEATING PLANE
MOUNTING FOOTPRINT SOLDERMASK DEFINED*
0.49
7X
0.30
8X
e
4
7X
L
NOTE 4
1.24
0.53
5 8X
b 0.10 C A B 0.05 C
NOTE 3
0.50 PITCH
DIMENSIONS: MILLIMETERS
BOTTOM VIEW
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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11
7WBD383
PACKAGE DIMENSIONS
UQFN8, 1.6x1.6, 0.5P CASE 523AN-01 ISSUE O
D
PIN ONE REFERENCE 2X
A B
EXPOSED Cu
MOLD CMPD
A3
E
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM THE TERMINAL TIP. DIM A A1 A3 b D E e L L1 L3 MILLIMETERS MIN MAX 0.45 0.60 0.00 0.05 0.13 REF 0.15 0.25 1.60 BSC 1.60 BSC 0.50 BSC 0.35 0.45 --- 0.15 0.25 0.35
0.10 C
2X
A1
0.10 C
OPTIONAL CONSTRUCTION
TOP VIEW
DETAIL B
(A3)
A b
0.05 C 0.05 C SIDE VIEW A1
8X 8X
(0.10) C
SEATING PLANE
L
3 5
L3
e
1 DETAIL A 8
7 8X
b 0.10 C A B 0.05 C
NOTE 3 7X
BOTTOM VIEW
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12
EE CC
L1
EE EE EE
DETAIL B
L3
(0.15)
OPTIONAL CONSTRUCTION
DETAIL A
SOLDERING FOOTPRINT*
1.70 1 0.50 PITCH
0.35
1.70
0.25
0.53
DIMENSIONS: MILLIMETERS
8X
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
7WBD383
PACKAGE DIMENSIONS
US8 CASE 493-02 ISSUE B
-X-
5
A
8
-Y-
J
DETAIL E B L
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION "A" DOES NOT INCLUDE MOLD FLASH, PROTRUSION OR GATE BURR. MOLD FLASH. PROTRUSION AND GATE BURR SHALL NOT EXCEED 0.140 MM (0.0055") PER SIDE. 4. DIMENSION "B" DOES NOT INCLUDE INTER-LEAD FLASH OR PROTRUSION. INTER-LEAD FLASH AND PROTRUSION SHALL NOT E3XCEED 0.140 (0.0055") PER SIDE. 5. LEAD FINISH IS SOLDER PLATING WITH THICKNESS OF 0.0076-0.0203 MM. (300-800 "). 6. ALL TOLERANCE UNLESS OTHERWISE SPECIFIED 0.0508 (0.0002 "). MILLIMETERS MIN MAX 1.90 2.10 2.20 2.40 0.60 0.90 0.17 0.25 0.20 0.35 0.50 BSC 0.40 REF 0.10 0.18 0.00 0.10 3.00 3.20 0_ 6_ 5_ 10 _ 0.23 0.34 0.23 0.33 0.37 0.47 0.60 0.80 0.12 BSC INCHES MIN MAX 0.075 0.083 0.087 0.094 0.024 0.035 0.007 0.010 0.008 0.014 0.020 BSC 0.016 REF 0.004 0.007 0.000 0.004 0.118 0.126 0_ 6_ 5_ 10 _ 0.010 0.013 0.009 0.013 0.015 0.019 0.024 0.031 0.005 BSC
1
4
R
P
G
S U
C -T-
SEATING PLANE
D 0.10 (0.004)
K
M
0.10 (0.004) T N TXY V
H R 0.10 TYP
M
SOLDERING FOOTPRINT*
3.8 0.15 0.50 0.0197 1.8 0.07 0.30 0.012 1.0 0.0394
SCALE 8:1 mm inches
DIM A B C D F G H J K L M N P R S U V
DETAIL E
F
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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13
7WBD383
PACKAGE DIMENSIONS
Micro8t CASE 846A-02 ISSUE H
D
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. 846A-01 OBSOLETE, NEW STANDARD 846A-02. MILLIMETERS NOM MAX -- 1.10 0.08 0.15 0.33 0.40 0.18 0.23 3.00 3.10 3.00 3.10 0.65 BSC 0.40 0.55 0.70 4.75 4.90 5.05 MIN -- 0.05 0.25 0.13 2.90 2.90 INCHES NOM -- 0.003 0.013 0.007 0.118 0.118 0.026 BSC 0.016 0.021 0.187 0.193 MIN -- 0.002 0.010 0.005 0.114 0.114
HE
E
PIN 1 ID
e
b 8 PL 0.08 (0.003)
M
TB
S
A
S
-T- PLANE 0.038 (0.0015) A1
SEATING
A c L
DIM A A1 b c D E e L HE
MAX 0.043 0.006 0.016 0.009 0.122 0.122 0.028 0.199
SOLDERING FOOTPRINT*
8X
1.04 0.041
0.38 0.015
8X
3.20 0.126
4.24 0.167
5.28 0.208
6X
0.65 0.0256
SCALE 8:1
mm inches
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
Micro8 is a trademark of International Rectifier.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative
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14
7WBD383/D


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